[ultim]

Hello IanB,

The enumeration values for GetCPUFlags() are being shared by both Avisynth and VirtualDub plugin support in Avisynth. VDub plugins loaded in Avisynth will get a function pointer to Avisynth's GetCPUFlags(), and thus it is important that Avisynth uses the same enumeration values for instruction sets as VirtualDub does. This has been ensured historically, but in latest Avisynth the flags of Avs and VDub have diverged.

Avisynth defines CPUF_SSE4_2 as 0x800, but in recent (to-be-released 1.10 series) versions of VirtualDub, the value 0x800 is used for AVX, not for SSE4.2 (a value for SSE4.2 is missing from VDub). As a result, if a VDub plugin that would use AVX gets loaded into Avisynth, Avisynth could report the instruction set as available on SSE4.2-capable CPUs even when they do not support AVX. The plugin would then try to execute illegal instructions and crash.

Could we sync to VirtualDub's values? Assuming VDub keeps adding new flags from LSB to MSB order, we could still define a flag for SSE4.2 without collision if we use an MSB bit. My suggestion:

enum {
  CPUF_FORCE        =  0x01,   //  N/A
  CPUF_FPU          =  0x02,   //  386/486DX
  CPUF_MMX          =  0x04,   //  P55C, K6, PII
  CPUF_INTEGER_SSE  =  0x08,   //  PIII, Athlon
  CPUF_SSE          =  0x10,   //  PIII, Athlon XP/MP
  CPUF_SSE2         =  0x20,   //  PIV, K8
  CPUF_3DNOW        =  0x40,   //  K6-2
  CPUF_3DNOW_EXT    =  0x80,   //  Athlon
  CPUF_X86_64       =  0xA0,   //  Hammer (note: equiv. to 3DNow + SSE2, which
                               //          only Hammer will have anyway)
  CPUF_SSE3         = 0x100,   //  PIV+, K8 Venice
  CPUF_SSSE3        = 0x200,   //  Core 2
  CPUF_SSE4         = 0x400,   //  Penryn, Wolfdale, Yorkfield
  CPUF_SSE4_1       = 0x400,
  CPUF_AVX          = 0x800,
  CPUF_SSE4_2       = (1u<<31) // Avisynth-only
};

EDIT: Actually, the instructions in SSE4.2 seem to be irrelevant for image processing, so it is questionable if it needs to be included in the enumeration at all.